First we take a look at the BIOS System Overview of the default configuration and after UCC is turned on.
Using BIOS L1.53, the BIOS isn’t able to detect the name of the unlocked cores. It only shows as “AMD Processor model unknown (64 bit)”. The L1, L2 and L3 cache size do differ. From the original X4′s 512KB L1, 2M L2 and 6M L3, the BIOS now detects it as 768KB of L1, 3MB L2 and 6MB L3.
When the system boots up with the UCC enabled, the Count number of cores shows 6 instead of the usual 4.
1. Screen shots of Phenom II X4 960T to a Phenom II X62. CPU-Z and EVEREST information of unhidden cores of a Phenom II X4 960T3.
April 17th, 2010 at 11:27 pm
When quoting news, please use quote [OCWORKBENCH] and not ocw or ocwb or oc workbench . There is no space in between the OC and WORKBENCH
May 3rd, 2010 at 2:32 pm
960T should be 8MB cache, why 6MB in picture??